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48 lines
1.6 KiB
C
48 lines
1.6 KiB
C
/*
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This allocates the counter variable in RAM
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As you can see in the Watch1 window after watching the
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counter variable and we see indeed in is stored at 0x20000000
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address in memory
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Looping through the dissassembly we now see that LDR.N instruction
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is being used to increment the value as opposed to the ADD instruction
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Looking at R0 we can see that the value is storing 0x20000000
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So R0 is referencing our int stored in RAM
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LDR.N means load the Register from memory
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The STR instruction is used here to save the value of R1 to the
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memory location reference in R0.
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An Arm processor is a Reduced Instruction Set Computer (RISC) Architecture
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Memory can be only read by the special load instructions (e.g. LDR, LDR.N)
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with data manipulations occuring only in the registers. Finally, the modified
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register values can be stored back into memory using the store instuctions (STR)
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This is in contrast to the Complex Instruction Set Computer (CISC) that make up
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instruction sets like the x86 where some of the complex operands can be operated
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on directly in memory.
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BTW p_int = (int *)0x20000002U; is a hack where you can grab a reference to
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a specific block of memory. Super dangerous
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BTW 0xDEADBEEF is a valid 32 bit hexadecimal number
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*/
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int counter = 0;
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int main(){
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// locations in memory can be stored in pointers
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int *p_int;
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// The operator & gives the address of the counter variable assigning it to
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// p_int.
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p_int = &counter;
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// To get the value stored at that memory location we must derefence it with
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// the * operator. *p_int then means the valu
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while (*p_int < 30){
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++(*p_int);
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}
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return 0;
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}
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