travis: start using ineffassign

It actually found two bugs.

devices/lirc/lirc.go

@@ -131,6 +131,9 @@ func (c *Conn) readData(r *bufio.Reader) error {
 	switch cmd {
 	case "SIGHUP":
 		_, err = c.w.Write([]byte("LIST\n"))
+		if err != nil {
+			return err
+		}
 	default:
 		// In case of any error, ignore the rest.
 		line, err := read(r)

experimental/devices/mfrc522/mfrc522.go

@@ -384,7 +384,7 @@ func (r *Dev) write(blockAddr byte, data []byte) error {
 	if backLen != 4 || read[0]&0x0F != 0x0A {
 		err = wrapf("can't write data")
 	}
-	return nil
+	return err
 }
 
 // preAccess  calculates CRC of the block address to be accessed and sends it to the device for verification.